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  SNL310 16-bit lcd controller ======== contents ======== 1. introduct ion ............................................................................................................... 3 2. feature s ....................................................................................................................... 3 3. pin assign ments ......................................................................................................... 4 4. i/o port ....................................................................................................................... .... 5 5. timer/co unter ............................................................................................................ 6 6. real time cl ock (rtc ) .................................................................................................... 6 7. da & pw m ....................................................................................................................... .6 7.1 dac ............................................................................................................................ ... 6 7.2 p w m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 8. extension bus ............................................................................................................. 8 8.1 extens ion bus for exter nal memory devic e ................................................................. 8 9. uart inte rface ......................................................................................................... 13 10. lcd driver in terface ........................................................................................ 13 10.1 8-bit inte rfac e .............................................................................................................. 13 10.2 1-bit inte rfac e .............................................................................................................. 16 10.3 lcd ram a s s i gnment ................................................................................................ 16 10.4 lcd ram m apping ..................................................................................................... 17 10.5 lcd interfac e c onfigurat ion ....................................................................................... 18 11. application diagram ......................................................................................... 20 11.1 applic ati on 1 ................................................................................................................ 20 11.2 applic ati on 2 ................................................................................................................ 21 12. bonding pad ........................................................................................................... 22 13. absolute maximu m ratin gs ............................................................................ 23 14. electrical charact eristi cs .......................................................................... 23 ver: 1.7 m ay 2, 2003 1
SNL310 16-bit lcd controller amendent history v e r s i o n d a t e d e s c r i p t i o n ver 1.5 october 28, 2002 v1.5 first issue ver 1.6 march 27, 2003 add revision history update application circuit page4: ap3.0~p3.10 -> p3.0~p3.10 page10: update addressing capability of table-2, figure-7 & figure-8 page12, 13: modify the read/wr ite wave-form of external memory page25: add one resister between cvdd and vdd for 3 batteries application. ver 1.7 may 2, 2003 final released version ver: 1.7 m ay 2, 2003 2
SNL310 16-bit lcd controller 1. introduction SNL310 is a high performance 16-bit dsp base processor with an 8-bit microprocessor interface to drive various external devic es, such as standard mask rom, flash, sram and 1-bit/8 -bit interface lcd drivers. besides, this chip also provides a uart interface to communicate with pc or other devices this chip is not only a simply controller but also a powerful software voice synthesizer to realize voice hi-compression, 4-ch wave-table melody. 2. features ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? power supply: 2.4v ~ 3.6v (for 2 batteries application) 3.6v ~ 5.1v (for 3 batteries application) built-in 16-bit dsp software-based voice/melody processing rich function instruction set 16mhz crystal or r-c type oscillator for system clock 8 mips cpu performances under 16mhz i/o ports: 64 i/o pins (p2.0~p2.15, p3.0~p3.15, p4.0~p4.15 and p5.0~p5.15) rom size: 96k*16 bits ram size: 4k*16 bits (including lcd ram) 8 interrupt sources 4 internal interrupt (t0, t1, t2 and rtc) 3 external interrupt (p3.0~p3.2) 1 da/pwm output two voice/melody channels or 4 channels wave-table melody three 8-bit timers with auto-reload function built-in 32768 crystal for real time clock built in pwm direct drive circuit and fixed current d/a output sampling rate: 4khz ~16khz built-in software voice synthesizer for multiple bit-rate solution uart interface provided ver: 1.7 m ay 2, 2003 3
SNL310 16-bit lcd controller 3. pin assignments symbol descript i ons no. of pin pin count xin high speed clock crystal input / rc-type oscillator input 1 1 xout high speed clock crystal output / rc-type oscillator input 1 2 lxin low speed clock crystal input 1 3 lxout low speed clock crystal output 1 4 cksel crystal/rc-type oscillator select for high speed clock 1 5 bp0 pwm output 1 1 6 bn0 pwm output 2 1 7 v o d a o u t p u t 1 8 r s t c h i p r e s e t 1 9 cvdd positive power supply for core circuit 2 11 vdd positive power supply 6 17 gnd negative power supply 8 25 test for test only 1 26 p2.0~p2.15 general i/o port p2.0~p2.15 16 42 p3.0~p3.10 general i/o port p3.0~p3.10 p3.0: int0 / rxd pin of uart interfac e p3.1: int1 / txd pin of uart interfac e p3.2: int2 p3.3: ir output p3.4~p3.5: general i/o p3.6: lcd serial data output (lsd) p3.7: lcd serial mode clock out1 (lco1) p3.8: lcd serial mode clock out2 (lco2) p3.9: lcd frame inversion control p3.10: com data synchronize signal / e_r p3.11~p3.14: chip select pin cs3~cs0 p3.15:address pin a[22] for 16-bit mode of extension bus 1 6 5 8 p4.0~p4.15 general i/o port p4.0~p4.15 address bus a[0..15] of external device interface 1 6 7 4 p5.0~p5.15 general i/o port p5.0~p5.5: address bus a[16..21] of external device interface p5.6: wrb / rdb of external device interface p5.7: enb / rdb of external device interface p5.8~p5.15: data bus d[0..7] of extension bus 1 6 9 0 ver: 1.7 m ay 2, 2003 4
SNL310 16-bit lcd controller 4. i/o port SNL310 provides totally 64 i/o pins (p2.0~ p2.15, p3.0~p3.15, p4.0~p4.15, and p5.0~p5.15). the input pull high resistor of each pin can be programmed by port pull-high register and the dire ction of i/o port is selected by port direction register. the port2 (p2.0~p2.15) and port 3 (p3.0~p3.15) can wake t he chip up from the stop mode and watch mode. these 64 programmable i/o pins provides not only a simply input/output function but also flexible configuration. it can be conf igured to be an 8-bit microprocessor interface to drive external devices, such as mask rom, flash and sram and lcd driver. furthermore, the pins ?txd? and ?rxd? are shared with p3.0 and p3.1. the internal structure of i/o pins is showed in figure-2 . pull-up resister latch pad to internal bus pull-up select in/out control in/out control i/o configuration of port2 ~ port5 figure-2 in some applications (e.g., infra red, ir), an output port needs to be modulated a carry signal. in the cases, the routine of modulat ion will occupy too many cpu computations. thus, a modulation circuit is built in chip to reduce cpu?s loading, timer2 overflow p3.3 2 iren i/o pad figure-3 ver: 1.7 m ay 2, 2003 5
SNL310 16-bit lcd controller the modulation function will be active when t he control bit ?iren? set to ?1?. and setting timer2 can generate the frequency of carry signal. 5. timer/counter SNL310 provides three 8-bit timer/event c ounters (t0/t1/t2). each timer is 8-bit binary up-count timer with pre-scalar and aut o-reload function. timer 0 (t0) was used when voice playing, so user should avoid to use t0. (sy s t e m clock)/ 2 * auto-reload clear com p arator mux /256 /8 /4 /2 if equal, time out 8-bit up counter enable p r e-scalar tnc (8-bit) figure-4 6. real time clock (rtc) to realize the watch function, 0.25s rtc (real time clock) is built in the chip. the real time clock has two clock sources. one is from system clock (16mhz) and another one is from low-speed clock s ource (32768hz). once the rtc function is enabled, the rtc circuit will generate an interr upt request per 0.25 second. if chip is in power-down mode and interrupt enable is active for rtc, then chip will be wake-up from power-down mode per 0.25 second. 7. da & pwm to play out voices, SNL310 contains two different solutions for the user?s applications, dac and pwm. the user can choose one of these two solutions in this design. only one function can be activated at one time. 7.1 dac a 10-bit current type digital-to-analog conv erter is built-in SNL310. the relationship between input digital data and output analog cu rrent signal is listed in the following table. also, the recommended application circuit is illustrated as follows. ver: 1.7 m ay 2, 2003 6
SNL310 16-bit lcd controller input data typical value of output current (ma) 0 0 1 3 / 1 0 2 4 ? n n * ( 3 / 1 0 2 4 ) ? 1 0 2 4 3 7.2 pwm a pwm (pulse width modulation) circuit is built-in SNL310. pwm can convert input digital data into pulse trains with suit able different pulse width. the maximum resolution of pwm is 10 bits. two huge out put stage circuits are included in SNL310. both of them are capable of driving speaker directly. the recommended application circuit is as follows. vcc buo1/vo 1k buo1/vo buo2 dac output pwm output ver: 1.7 m ay 2, 2003 7
SNL310 16-bit lcd controller 8. extension bus SNL310 totally provides 64 i/o pins, those i/o pins can be configured to be address, data and control signal of extension bus ex cept p2.0~p2.15 are the dedicated general i/o pins. table-1 shows the relation among p3.5~p3.15, p4.0~p4.15, p5.0~p5.7 and i/o pins. i/o pin extension bus descriptions p3.10 e_r rd signal for 6800 interface p3.15 a[22] address pin of 16-bit mode memory accessing p3.11~p3.14 cs3~cs0 chip select pin p4.0~p4.15 a[0..15] address bus p 5 . 0 ~ p 5 . 5 a [ 1 6 . . 2 1 ] address b u s p 5 . 6 w r / r d w r i t e s i g n a l p 5 . 7 r d / e r e a d s i g n a l p 5 . 8 ~ p 5 . 1 5 d [ 0 . . 7 ] data b u s table-1 SNL310 provides four chip select pins for ex ternal devices, each chip select pin can be connected to memory device or lcd driver . besides, all the addr ess, data and control pins of ex tension bus are shared with general i/o pins. normally, the default setting is general i/o pins for ex tension bus. user ju st need to set the enable control bit of extension bus then all the corresponding i/o pins will switch to be extension bus automatically. 8.1 extension bus for external memory device SNL310 provides two access modes fo r external memory device. one is 8-bit mode and another one is 16-bit mode. user has to use 16-bit mode if executed user?s program is from external memory. most important of all, sn l310 only can execute user?s program from the first external dev ice. so user has to connect mask rom or flash which already burn-in user?s program to the ?cs1? a0 a21 a21 SNL310 a0 ce\ cs1 mask rom/ flash a22 a0 a22 a22 SNL310 a0 ce\ cs1 mask rom/ flash 8-bit mode of extension bu s 16-bit mode of extension bus figure-5 ver: 1.7 m ay 2, 2003 8
SNL310 16-bit lcd controller : : : : 0x000000 0x000001 0x000002 byte1 0x000003 0x000004 0x000005 : : : : byte2 byte3 byte4 byte5 byte6 word 1 word 2 rom/flash/sram read from SNL310 : : : : 0x000000 0x000001 0x000002 byte1 0x000003 0x000004 0x000005 : : : : byte2 byte3 byte4 byte5 byte6 byte1 rom/flash/sram byte2 read from SNL310 figure-6 figure-5 shows the hardware connection for 8-bi t/16-bit mode for external memory accessing. the memory size calculation of each external memory device is a little difference between 8-bit and 16-bit mode because of the address pin ?a[22]?. in 16-bit mode, ?a[22]? pin can be connected to external memory. and chip will read one byte data from external memory twice to get a complete 16-bit instruction code or data. so the maximum memory size can support up to 64m bits of each device. in 8-bit mode, considering the memory m apping issue, user can?t connected ?a[22]? pin to external memory. so t he maximum memory size can support up to 32m bits. figure-6 figures out how the data be read from external memory in 8-bit/16-bit mode. however, all the data access from exter nal memory is treated as ram accessing except executes user?s progr am from external memory. user should use indirection ram access instruction to read data from external memory. therefore, each chip selects pin representing a ram bank in memory allocation of SNL310. device no. ram bank start address end address 1 st external device 0x008 ~ 0x03f 0x0080000 0x03fffff 2 nd external device 0x040 ~ 0x07f 0x0400000 0x07fffff 3 rd external device 0x 080 ~ 0x0bf 0x0800000 0x0bfffff 4 th external device 0x 0c0 ~ 0x0ff 0x0c00000 0x0ffffff table-2 addressing capability (16-bit mode) ver: 1.7 m ay 2, 2003 9
SNL310 16-bit lcd controller the addressing capacity of each external device is showed in table-2 . the memory allocation of each bank is 64k words and t he addressing region of each device totally includes 64 banks except 1 st device. in fact, the ram bank of 1 st device is shared with internal memory of SNL310, so there are only 56 banks in the first device. in another hand, user can not use full memory location in the first device. the actual addressing capacity of first device is less than 64m bits (64m bits ? 8m bits) = 56m bits in 16-bit mode. user's data or program 32m bit non-use 32m bits 0x0000000 0x03fffff 0x01fffff 64m bits 0x0200000 figure-7 user's data or program 8m bit non-use 56m bits 0x0000000 0x03fffff 0x0040000 0x003ffff 64m bits figure-8 ver: 1.7 m ay 2, 2003 10
SNL310 16-bit lcd controller in figure-7 , cs0 of SNL310 connected a 32m-bit memory. so the useful addressing capacity is from 0x0200000 ~ 0x3fffff. in figure-8 , cs0 of SNL310 connected a 64m-byte memory. so the useful addressing capacity is from 0x0040000 ~ 0x03fffff. (complete read cycle) clock cs\ rd\ a[0..22] in d[0..7] out d[0..7] 62.5ns 2 * n * clocks (complete write cycle) clock cs\ wr\ a[0..22] in d[0..7] out d[0..7] 62.5ns 2 * n * clocks access timing for 8-bit mode figure-9 ver: 1.7 m ay 2, 2003 11
SNL310 16-bit lcd controller clock cs\ rd\ a[0..22] in d[0..7] out d[0..7] 62.5ns (complete read cycle) 4 * n * clocks clock cs\ wr\ a[0..22] in d[0..7] out d[0..7] 62.5ns (complete write cycle) 4 * n * clocks access timing for 16-bit mode figure-10 figure-9 and figure-10 show the accessing timing for 8-bit mode and 16-bit mode. considering to compatible with different a ccess time memory, user can set different speed ratio in the special register ?edi? (e xternal device information register). the value ?n? in figure-9 and figure-10 is relative to the setting of speed ratio of edi register. ver: 1.7 m ay 2, 2003 12
SNL310 16-bit lcd controller 9. uart interface the built-in uart supports the serial data transmission. SNL310 provides data phase auto-clock calibration function. the rxd pin and txd pin are shared with p3.0 & p3.1, and user can switch p3.0 and p3.1 to be rxd and txd by configuring the rxd/txd enable bit of uartc register. user can configure the baud rate of uart from 1200bps to 115200bps just by using the singl e crystal system (16mhz crystal). all the clock base of baud rate is counting by timer2. 10. lcd driver interface 10.1 8-bit interface the extension bus of SNL310 s upports not only external memory device but also 8-bit 8080/6800 microprocessor interface for external lcd controller which already built-in lcd display ram. user should enable ext ension bus before driving external lcd driver, and define the chip select pin you used to connect to lcd driver in ebc register. in 8-bit interface lcd controller, lcd disp lay data is stored in lcd driver. any change of lcd display is sent out to external lcd driver?s ra m by addressing different sram space. the interface emulates the 8080/ 6800-series interface to speed up the interface data moving processing. figure-11 and figure-12 are the timing diagrams between SNL310 and lcd driver by using 8-bit 8080/6800 interface. ver: 1.7 m ay 2, 2003 13
SNL310 16-bit lcd controller 8080-series interface : figure-11 6800-series interface : a0 d0~d7 (write) d0~d7 (read) wr, rd cs e d0~d7 (write) d0~d7 (read) a0 r/w cs figure-12 in SNL310, the interface with external 8-bi t mode lcd driver is shared with extension bus. when lcd driver connected to SNL310, ch ip will allocate a memory area for lcd driver and the size of this memory area will depend on unit size of each external device. so it is easy to configure lcd driver and read/write data to/from lcd driver. figure-13 and figure-14 show out the system connection of 808/6800 lcd interfaces between SNL310 and lcd driver. ver: 1.7 m ay 2, 2003 14
SNL310 16-bit lcd controller a[0..21] d[0..7] rd a[0..21] d[0..7] cs0 cs1 address bus data bus memory cs2 cs3 a0 d[0..7] lcd driver SNL310 wr ce wr rd rd wr cs1 8080 lcd driver interface figure-13 a[0..21] d[0..7] rd a[0..21] d[0..7] cs0 cs1 address bus data bus memory cs2 cs3 a0 d[0..7] lcd driver SNL310 wr ce wr e_rd e wr cs1 6800 lcd driver interface figure-14 ver: 1.7 m ay 2, 2003 15
SNL310 16-bit lcd controller 10.2 1-bit interface SNL310 supports not just 8-bit interface but al so 1-bit interface lcd driver. for this kind lcd driver doesn?t include display ram. a ll the display data is stored in host cpu. so host cpu has to specify a dedicate in terface to drive lcd driver. beside the interface, SNL310 reserves the last 2k words ram (0 x0800~0x0fff) for stored the display data, then interface circuit will send accurate signal to lcd driver automatically. p3.6~p3.10 can be configured to be 1-bit inte rface for lcd driver just by property setting control register. table-3 shows the relation between p3.6~p3.10 and lcd driver interface. i/o pin extension bus descriptions p3.6 lsd lcd serial data output p3.7 lco1 lcd serial mode clock out1 p3.8 lco2 lcd serial mode clock out2 p3.9 lfc lcd frame inversion control p3.10 coms com data synchronize signal table-3 10.3 lcd ram assignment generally, those 1-bit interfac e lcd drivers don?t built-in the lcd display ram. all the display data have been stored in cpu side. the SNL310 already built-in totally 4k words ram, so user can set a property value of lcd ram start address (lrsa) register to assign a ram location for l cd display data. the start address setting formula is shown as bellow: calculating formula of start address if seg number divided by 16 4096-(seg numbe/16)*com number => for b/w 4096-(seg numbe/16)*com number*2 => for 4 gray levels if seg number can?t divided by 16 4096-((seg numbe/16)+1)*com number => for b/w 4096-((seg numbe/16)+1)*com number*2 => for 4 gray levels once upon user set the start address of lcd display ram and active this interface function, chip will send the display data out to external lcd driver at the right time. ver: 1.7 m ay 2, 2003 16
SNL310 16-bit lcd controller 10.4 lcd ram mapping 65com x 128seg seg 0?????15 16????..31 ??????... 104???..119 120???..127 b i t 0 ? ? ? ? . b i t 1 5 b i t 0 ? ? ? ? . b i t 1 5 ??????... b i t 0 ? ? ? ? . b i t 1 5 b i t 0 ? ? ? ? . b i t 1 5 com0 0 x 0 d f 8 0 x 0 d f 9 ? ? ? ? ? ? . . . 0 x 0 d f e 0 x 0 d f f com1 0 x 0 e 0 0 0 x 0 e 0 1 ? ? ? ? ? ? . . . 0 x 0 e 0 6 0 x 0 e 0 7 : : : : : : : : : : : : : : : : : : com63 0 x 0 f f 0 0 x 0 f f 1 ? ? ? ? ? ? . . . 0 x 0 f f 6 0 x 0 f f 7 com64 0 x 0 f f 8 0 x 0 f f 9 ? ? ? ? ? ? . . . 0 x 0 f f e 0 x 0 f f f 64com x 128seg seg 0?????15 16????..31 ??????... 104???..119 120???..127 b i t 0 ? ? ? ? . b i t 1 5 b i t 0 ? ? ? ? . b i t 1 5 ??????... b i t 0 ? ? ? ? . b i t 1 5 b i t 0 ? ? ? ? . b i t 1 5 com0 0 x 0 e 0 0 0 x 0 e 0 1 ? ? ? ? ? ? . . . 0 x 0 e 0 6 0 x 0 e 0 7 com1 0 x 0 e 0 8 0 x 0 e 0 9 ? ? ? ? ? ? . . . 0 x 0 e 0 e 0 x 0 e 0 f : : : : : : : : : : : : : : : : : : com62 0 x 0 f f 0 0 x 0 f f 1 ? ? ? ? ? ? . . . 0 x 0 f f 6 0 x 0 f f 7 com63 0 x 0 f f 8 0 x 0 f f 9 ? ? ? ? ? ? . . . 0 x 0 f f e 0 x 0 f f f 48com x 128seg seg 0?????15 16????..31 ??????... 104???..119 120???..127 b i t 0 ? ? ? ? . b i t 1 5 b i t 0 ? ? ? ? . b i t 1 5 ??????... b i t 0 ? ? ? ? . b i t 1 5 b i t 0 ? ? ? ? . b i t 1 5 com0 0 x 0 e 8 0 0 x 0 e 8 1 ? ? ? ? ? ? . . . 0 x 0 e 8 e 0 x 0 e 8 f c0m1 0 x 0 e 9 0 0 x 0 e 9 1 ? ? ? ? ? ? . . . 0 x 0 e 9 6 0 x 0 e 9 7 : : : : : : : : : : : : : : : : : : com46 0 x 0 f f 0 0 x 0 f f 1 ? ? ? ? ? ? . . . 0 x 0 f f 6 0 x 0 f f 7 com47 0 x 0 f f 8 0 x 0 f f 9 ? ? ? ? ? ? . . . 0 x 0 f f e 0 x 0 f f f ver: 1.7 m ay 2, 2003 17
SNL310 16-bit lcd controller 32com x 128seg seg 0?????15 16????..31 ??????... 104???..119 120???..127 b i t 0 ? ? ? ? . b i t 1 5 b i t 0 ? ? ? ? . b i t 1 5 ??????... b i t 0 ? ? ? ? . b i t 1 5 b i t 0 ? ? ? ? . b i t 1 5 com0 0 x 0 f 0 0 0 x 0 f 0 1 ? ? ? ? ? ? . . . 0 x 0 f 0 6 0 x 0 f 0 7 c0m1 0 x 0 f 0 8 0 x 0 f 0 9 ? ? ? ? ? ? . . . 0 x 0 f 0 e 0 x 0 f 0 f : : : : : : : : : : : : : : : : : : com31 0 x 0 f f 0 0 x 0 f f 1 ? ? ? ? ? ? . . . 0 x 0 f f 6 0 x 0 f f 7 com32 0 x 0 f f 8 0 x 0 f f 9 ? ? ? ? ? ? . . . 0 x 0 f f e 0 x 0 f f f : : 10.5 lcd interface configuration there are thee control regist ers (lcdc, comn and segn) to configure hardware to generate correct interface signal for lcd driver. the comn and segn register are used to specify how many common and segm ent number of lcd display. and the lcdc register is the most impor tant configuration register for this interface. for the detail setting is showed as bellow: lcd configuration register (lcdc) lcdc init ial value=0xxx xxx0 0000 0001 b i t 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 0 l c d c l c d e n b - - - - - - gray c p r e - s c a l a r f r a t e lcdenb: 1-bit lcd interface enable control 0: disable 1: enable garyc: gray level control: 00: blank/white 01: 2-level 10: 4-level pre-scalar: define lco1 clock rate 0x000: 16mhz/4 0x001: 16mhz/8 0x010: 16mhz/16 0x011: 16mhz/32 0x100: 16mhz/64 0x101: 16mhz/128 0x 110: 16mhz/256 0x111: 16mhz/512 frate: 0x0001: 256hz (1/256 sec) 0x0010: 128hz (2/256 sec) 0x0011: 85.3hz (3/256 sec) 0x0100: 64hz (4/256 sec) : : 0x1111: 17hz (15/256 sec) ver: 1.7 m ay 2, 2003 18
SNL310 16-bit lcd controller note: 1. the real frame rate  for b/w display = frate value/2  for 2 gray level = frate value/4  for 4 gray level = frate value/6 2. pre-scalar calculation formula formula: divider value * 2 15 > seg number * (com number+1) * 2 (pre-scalar value+1) exam ple: lcd display = 80com x 160seg (b/w display) fram e rate = 64 2 * 2 15 >160*(80+1)*2 (pre-s c a l a r v a l ue+1) pre-scalar < = 1 (0x001) ver: 1.7 m ay 2, 2003 19
SNL310 16-bit lcd controller 11. application diagram 11.1 application 1 3v/16m cry s tal, w i th 8-bit lcd driver and 32m flash memory c1 1uf vdd vdd vdd c9 1uf c6 1uf c4 1uf c11 1uf c8 1uf c7 1uf c5 1uf c3 1uf 0 2 1 speaker 4 3 6 5 (8 x 8 matrix key) 7 8 9 1 0 (3v flash memory) 1 1 1 2 vdd 1 4 1 3 1.5v 1 5 1.5v vdd y 1 3 2 7 6 8 h z c 1 2 1 5 p f c 1 3 1 5 p f vdd 2 _ 1 1 2 _ 9 2 _ 8 2 _ 1 4 2 _ 1 2 2 _ 1 0 2 _ 1 5 2 _ 1 3 c10 47uf r1 220k c16 0.1uf vdd y2 16mhz c14 15pf c15 15pf u2 mx29lv320t/b a15 1 a14 2 a13 3 a12 4 a11 5 a10 6 a9 7 a8 8 a19 9 a20 10 we_ 11 reset_ 12 a21 13 wp_/acc 14 ry/by_ 15 a18 16 a17 17 a7 18 a6 19 a5 20 a4 21 a3 22 a2 23 a1 24 a0 25 ce_ 26 gnd 27 oe_ 28 q0 29 q8 30 q1 31 q9 32 q2 33 q10 34 q3 35 q11 36 vcc 37 q4 38 q12 39 q5 40 q13 41 q6 42 q14 43 q7 44 q15/a-1 45 gnd 46 byte_ 47 a16 48 u3 SNL310 vdd 3 vdd 19 vdd 37 vdd 48 cvdd 85 cvdd 26 gnd 5 gnd 17 gnd 28 gnd 41 gnd 46 rst 83 bp0 47 bn0 49 vo 4 xin 6 xout 7 lxin 2 lxout 1 testm 53 cksel 52 p2.0 90 p2.1 89 p2.2 88 p2.3 87 p2.4 86 p2.5 82 p2.6 81 p2.7 80 p2.8 78 p2.9 77 p2.10 76 p2.11 75 p2.12 74 p2.13 73 p2.14 72 p2.15 71 gnd 50 gnd 84 p3.0 70 p3.1 69 p3.2 68 p3.3 67 p3.4 66 p3.5 65 p3.6 64 p3.7 63 p3.8 61 p3.9 59 p3.10 58 p3.11 57 p3.12 56 p3.13 55 p3.14 54 p3.15 51 p5.0 25 p5.1 24 p5.2 23 p5.3 22 p5.4 21 p5.5 20 p5.6 18 p5.7 16 p5.8 15 p5.9 14 p5.10 13 p5.11 12 p5.12 11 p5.13 10 p5.14 9 p5.15 8 p4.0 45 p4.1 44 p4.2 43 p4.3 42 p4.4 40 p4.5 39 p4.6 38 p4.7 36 p4.15 27 p4.14 29 p4.13 30 p4.12 31 p4.11 32 p4.10 33 p4.9 34 p4.8 35 vdd 60 vdd 79 132 x 65 u1 s6b1713 dummy temps intrs hpm dcdc5b bsts v0 v1 v2 v3 v4 vr c1- c1+ c2- c2+ c3- c3+ vout vdd vss ps mi cls ms duty1 duty0 db7_sid db6_sclk db5 db3 db2 db1 db0 e_rd rw_wr rs resetb cs2 cs1b disp cl m frs dummy db4 c2 0.1uf vdd vdd vdd cs0\ c1- c1+ c2- c2+ c3- c3+ v0 v1 v2 v3 v4 d7 ce\ a a a a a a a p2_0 a p2_1 a p2_2 a a p2_3 a p2_4 a a p2_5 a p2_6 p2_7 a p2_8 p2_9 p2_10 p2_11 p2_12 p2_13 p2_15 p2_14 p2_2 p2_0 p2_1 p2_6 p2_4 p2_3 p2_7 p2_5 p p p p p p p p rst a16 lsd lco1 lco2 comd frame a18 a17 byte\ a19 a20 a0 d6 gnd a17 d5 d7 vdd d2 d4 d3 d0 d1 gnd a1 oe\ ce\ a21 a13 a15 a10 a9 a14 a11 a12 a16 wr\rd a21 a20 busy\ vdd a22 vdd a19 a7 a6 a2 a18 a8 a5 a3 a4 rd wr d2 d1 d0 d3 d4 d6 d5 d7 d6 d5 d4 d3 d2 d1 d0 rd c3+ c3- c2+ c1- c1+ c2- v3 v4 v2 v1 v0 a1 wr rst cs0\ ver: 1.7 m ay 2, 2003 20
SNL310 16-bit lcd controller 11.2 application 2 3v/16m cry s tal, w i th 1-bit lcd driver (80 x 160) and 32m flash memory 0 1 2 speaker 3 (8 x 8 matrix key) 4 (3v flash memory) 6 5 2 _ 0 7 8 1 0 9 1 1 vdd 1 2 1 4 1 3 1.5v 1 5 1.5v vdd y 1 3 2 7 6 8 h z c 3 1 5 p f c 4 1 5 p f vdd 2 _ 9 2 _ 8 2 _ 1 1 2 _ 1 0 2 _ 1 2 2 _ 1 4 2 _ 1 3 2 _ 1 5 c2 47uf r1 220k c7 0.1uf vdd 160 x 80 u3 1-bit lcm ld0 load cp flm ac blank poff vcc gnd y2 16mhz vdd vdd c5 15pf c6 15pf u2 mx29lv320t/b a15 1 a14 2 a13 3 a12 4 a11 5 a10 6 a9 7 a8 8 a19 9 a20 10 we_ 11 reset_ 12 a21 13 wp_/acc 14 ry/by_ 15 a18 16 a17 17 a7 18 a6 19 a5 20 a4 21 a3 22 a2 23 a1 24 a0 25 ce_ 26 gnd 27 oe_ 28 q0 29 q8 30 q1 31 q9 32 q2 33 q10 34 q3 35 q11 36 vcc 37 q4 38 q12 39 q5 40 q13 41 q6 42 q14 43 q7 44 q15/a-1 45 gnd 46 byte_ 47 a16 48 c1 0.1uf vdd u1 SNL310 vdd 3 vdd 19 vdd 37 vdd 48 cvdd 85 cvdd 26 gnd 5 gnd 17 gnd 28 gnd 41 gnd 46 rst 83 bp0 47 bn0 49 vo 4 xin 6 xout 7 lxin 2 lxout 1 testm 53 cksel 52 p2.0 90 p2.1 89 p2.2 88 p2.3 87 p2.4 86 p2.5 82 p2.6 81 p2.7 80 p2.8 78 p2.9 77 p2.10 76 p2.11 75 p2.12 74 p2.13 73 p2.14 72 p2.15 71 gnd 50 gnd 84 p3.0 70 p3.1 69 p3.2 68 p3.3 67 p3.4 66 p3.5 65 p3.6 64 p3.7 63 p3.8 61 p3.9 59 p3.10 58 p3.11 57 p3.12 56 p3.13 55 p3.14 54 p3.15 51 p5.0 25 p5.1 24 p5.2 23 p5.3 22 p5.4 21 p5.5 20 p5.6 18 p5.7 16 p5.8 15 p5.9 14 p5.10 13 p5.11 12 p5.12 11 p5.13 10 p5.14 9 p5.15 8 p4.0 45 p4.1 44 p4.2 43 p4.3 42 p4.4 40 p4.5 39 p4.6 38 p4.7 36 p4.15 27 p4.14 29 p4.13 30 p4.12 31 p4.11 32 p4.10 33 p4.9 34 p4.8 35 vdd 60 vdd 79 d7 a ce\ a a a a a a p a p2_1 a p2_2 a a p2_3 a p2_4 a p2_5 a p2_6 a p2_7 a p2_8 p2_9 p2_10 p2_11 p2_12 p2_13 p2_14 p2_15 p2_0 p2_1 p2_3 p2_2 p2_4 p2_5 p2_6 p2_7 p p p p p p p p rst frame comd lco1 lco2 lsd lsd a16 lco1 lco2 frame comd a17 a18 a19 byte\ a20 a0 gnd a17 vdd d7 d6 d4 d5 d0 d3 d2 a1 gnd d1 a21 ce\ oe\ a13 a15 a14 a10 a9 a16 a11 a12 vdd wr\rd a21 a19 busy\ a20 vdd a22 a7 a6 a8 a3 a18 a2 a5 a4 wr\rd d0 d1 d2 d4 d3 d5 d6 ver: 1.7 m ay 2, 2003 21
SNL310 16-bit lcd controller 12. bonding pad 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 ( 0 .00,0.00) lx o u t lx in vd d vo gn d xin xo ut p5 .1 5 p5 .1 4 p5 .1 3 p5 .1 2 p5 .1 1 p5 .1 0 p5 .9 p5 .8 p5 .7 gn d p5 .6 vd d p5 .5 p5 .4 p5 .3 p5 .2 p5 .1 p5 .0 cv d d p4 .1 5 gnd p4 . 1 4 p4 . 1 3 p4 .1 2 p4 .1 1 p4 . 1 0 p4 .8 p4 .7 vd d p4 .6 p4 .5 p4 . 4 gnd p4 .3 p4.2 p4 .0 gn d bp 0 vd d bn 0 gn d p3 .1 5 ck se l te s t m p3 .1 4 p3 .1 3 p3 .1 1 p3 .1 0 p3 .9 vd d p3 .8 gn d p3 .7 p3 .6 p3 .5 p3 .4 p3 .3 p3 .2 p3 .1 p3 .0 p2 . 1 5 p2 . 1 4 p2 . 1 3 p2 . 1 2 p2 . 1 1 p2 . 1 0 p2 . 9 p2 . 8 vd d p2 . 7 p2 . 6 p2 . 5 rs t gn d cv d d p2 . 4 p2 . 3 p2 . 2 p2 . 1 p2 . 0 note: the substrate m u st be connected to vss in pcb layout. ver: 1.7 m ay 2, 2003 22
SNL310 16-bit lcd controller 13. absolute maximum ratings items sy mbol min max unit. supply voltage v dd - v - 0 . 3 6 . 0 v input voltage v in g n d - 0 . 3 v dd + 0 . 3 v operating temperature t op 0 5 5 o c storage temperature t stg - 5 5 . 0 1 2 5 . 0 o c 14. electrical characteristics item sy m. min. ty p. max. unit condition operating voltage v dd 2 . 4 - 3 . 6 v * 1 . v dd 3 . 6 - 5 . 1 v * 2 . standby current i sby - - 2 . 0 u a v dd =3v, no load operating current i op r - - 5 m a v dd =3v, no load input current of p2, p3, p4, p5 i ih - - 1 0 . 0 u a v dd =3v,v in =3v drive current of p2, p3, p4, p5 i od - 1 0 - m a v dd =3v,v o =2.4v sink current of p2, p3, p4, p5 i os - 1 2 - m a v dd =3v,v o =0.4v drive current of buo1 i od 1 0 0 1 2 0 - m a v dd =3v,buo1=1.5v sink current of buo1 i os 1 0 0 1 2 0 - m a v dd =3v,buo1=1.5v drive current of buo2 i od 1 0 0 1 2 0 - m a v dd =3v,buo2=1.5v sink current of buo2 i os 1 0 0 1 2 0 - m a v dd =3v,buo2=1.5v oscillation freq. (crystal) f os c - 1 6 . 0 - m h z v dd =3v note: 1. for 2 batteries application. 2. for 3 batteries application, user s hould add 1 resister between power and cvdd pin of chip. ver: 1.7 m ay 2, 2003 23
SNL310 16-bit lcd controller ver: 1.7 may 2, 2003 24 disclaimer the information appearing in sonix web pages (?this publication?) is believed to be accurate. however, this publication could contain tec hnical inaccuracies or typographical errors. the reader should not assume that this publication is error-free or that it will be suitable for any particular purpose. sonix makes no warranty, express, statutory implied or by description in this publicat ion or other documents which are referenced by or linked to this publication. in no event shall sonix be liable for any special, incidental, indirect or consequential damages of any kind, or any damages whatsoever, including, without limitati on, those resulting from loss of us e, data or profit s, whether or not advised of the possibility of damage, and on any theory of li ability, arising out of or in connection with the use or performance of this publication or other documents which are referenced by or linked to this publication. this publication was developed for products offered in taiwan. sonix may not offer the products discussed in this document in other countries. information is subject to change without notice. please contact so nix or its local representative for information on offerings available. integrat ed circuits sold by sonix are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. the application circuits illustrated in this document are for reference purposes only. sonix disclaims all warranties, including the warranty of merchantability or fitness for any purp ose. sonix reserves the right to halt production or alter the specificati ons and prices, and discontinue marketing the products listed at any time without notice. accordingly, the reader is cautioned to verify that the data sheets and other informa tion in this publication are current before placing orders. products described herein are intended for use in normal commercial applications. applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipm ent, are specifically not recommended without additional processing by sonix for such application.


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